Annotation The 14 papers in this collection from the August 2001 workshop are divided into five sessions on semiconductor memory design, BIST, redundancy and error control, fault models and multi-port SRAM testing, and verification and testing. Some of the topics are evaluation of redundancy analysis algorithms, a parallel approach for testing multi-port static random access memories, a low output resistance charge pump for flash memory programming, BIST-based bitfail mapping of an embedded DRAM, and an orthogonal transpose- RAM cell array architecture with an alternate bit-line to bit-line contact scheme. No subject index. c. Book News Inc.